Basser Seminar Series

Scalable Scientific Visualization : a Pixel Plumber's Perspective

Mark Shand
Hewlett Packard

Wednesday 2 November 2005, 4-5pm (NOTE: New seminar time)

Basser Conference Room (Madsen G92)

Abstract

Driven by the gaming market, PC graphic cards have seen a phenomenal growth in rendering power for 3D scenes over the past decade. These cards are causing a fundamental rethink in how high end rendering systems are built as system designers attempt to apply to large scale interactive rendering the clustered computing techniques that have revolutionized high performance computing.

HP's high performance technical computing division and HP Labs have jointly developed a prototype scalable visualization system for the interactive presentation and manipulation of synthetic images. The system addresses the visualization of data sets that are too large to be rendered with a single workstation or whose rendering demands cannot by met with acceptable performance by a single graphic card.

The system uses clustered computing techniques to combine commodity workstations and graphic cards, high performance cluster interconnects (infiniband 4x) and custom compositing cards based on FPGAs. It is a sort-last compositing system that uses the reconfigurability of FPGAs to support a wealth of application specific compositing operators.
In this talk special attention is given to how pixels are marshalled through the system to meet the goals of scalability, low latency and high throughput.

Speaker's Biography

Mark Shand received a BSc with 1st class honours and university medal in 1982 from the University of Sydney. In 1988 he was award a PhD for his dissertation entitled "Hierarchical (VLSI) Artwork Analysis" also from the University of Sydney. After a short stint with CSIRO he joined Digital Equipment Corporation's Paris Research Laboratory in 1989. Mergers and acquisitions caused his employer's name to change to Compaq and then HP. Through his professional career his research has focussed primarily on novel uses of FPGA for compute and I/O acceleration in computer systems. His wider interests extend to computer architecture, computer system performance analysis, and computer graphics and image processing.

Career highlights include the world's fastest implementation of the RSA cryptographic algorithm in 1992 and key roles in the development of revolutionary image acquisition system for the Swedish Vacuum Solar Telescope in the second half of the 90's. His recent work has focussed on a scalable image rendering system for scientific visualization based of clustered computing techniques.